ADC/DAC Questions (ECET 340)

1. (TCO 5) An 8-bit DAC has an output of 3.92 mA with an input of 0110 0010. What is the full-scale output?

2. (TCO 5) What is the resolution, in percent, of a 12-bit DAC?

3. (TCO 5) In the HCS12 SCI circuitry, signals are sampled at 16 times the baud rate. What is the sampling clock at 9600 baud?

4. (TCO 5) In your own words, describe why DACs use the R-2R ladder configuration, instead of a binary ladder.

5. (TCO 5) In your own words, describe two advantages of using the SPI, instead of the SCI ports, on the HCS12 micro controller.


01100010 bin = 98 dec

3.92 mA……….98

x mA ………….255

$x =3.92*255/98 = 10.2 mA$


$2^{12} = 4096$

resolution in percent is $100/4096=0.0244 %$

3. Sampling clock is $9600*16 =153600 Hz =153.6kHz$

4. It is easier in terms of industrial process of fabrication of Si chips by lithography and vacuum deposition to obtain resistances of low values of R and 2R and to combine them into a R-2R ladder than to design Si chips having ladders with R ranging from R to 256*R for a 8 bit ADC converter.

5. First reason is that SPI has larger communication speeds than SCI. Second reason is that SPI is a synchronous (clocked) interface, whereas SCI in a non synchronous interface. Hence errors of transmission can be detected easier on SPI.